Way-predicting set-associative cache for high performance and low energy consumption

Koji Inoue, Tohru Ishihara, Kazuaki Murakami

Research output: Contribution to conferencePaper

220 Citations (Scopus)

Abstract

This paper proposes a new approach using way prediction for achieving high performance and low energy consumption of set-associative caches. By accessing only a single cache way predicted, instead of accessing all the ways in a set, the energy consumption can be reduced. This paper shows that the way-predicting set-associative cache improves the ED (energy-delay) product by 60-70% compared to a conventional set-associative cache.

Original languageEnglish
Pages273-275
Number of pages3
Publication statusPublished - Dec 1 1999
EventProceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED) - San Diego, CA, USA
Duration: Aug 16 1999Aug 17 1999

Conference

ConferenceProceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED)
CitySan Diego, CA, USA
Period8/16/998/17/99

Fingerprint

Energy utilization

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Inoue, K., Ishihara, T., & Murakami, K. (1999). Way-predicting set-associative cache for high performance and low energy consumption. 273-275. Paper presented at Proceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED), San Diego, CA, USA, .

Way-predicting set-associative cache for high performance and low energy consumption. / Inoue, Koji; Ishihara, Tohru; Murakami, Kazuaki.

1999. 273-275 Paper presented at Proceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED), San Diego, CA, USA, .

Research output: Contribution to conferencePaper

Inoue, K, Ishihara, T & Murakami, K 1999, 'Way-predicting set-associative cache for high performance and low energy consumption', Paper presented at Proceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED), San Diego, CA, USA, 8/16/99 - 8/17/99 pp. 273-275.
Inoue K, Ishihara T, Murakami K. Way-predicting set-associative cache for high performance and low energy consumption. 1999. Paper presented at Proceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED), San Diego, CA, USA, .
Inoue, Koji ; Ishihara, Tohru ; Murakami, Kazuaki. / Way-predicting set-associative cache for high performance and low energy consumption. Paper presented at Proceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED), San Diego, CA, USA, .3 p.
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