• 1880 引用
  • 19 h指数
1978 …2017
Pureに変更を加えた場合、すぐここに表示されます。

研究成果 1978 2017

フィルター
会議での発言
2000
2 引用 (Scopus)

Functional redundancy for dynamic exploitation of performance-energy consumption trade-offs

Goulart Ferreira, V. M. & Yasuura, H., 2000, Proceedings - 13th Symposium on Integrated Circuits and Systems Design. Institute of Electrical and Electronics Engineers Inc., p. 165-170 6 p. 876025

研究成果: 著書/レポートタイプへの貢献会議での発言

Redundancy
Energy utilization
Networks (circuits)
Electric power utilization
Systems analysis

One language or more? How can we design an SoC at a system level?

Imai, M., Smith, G., Schulz, S., Bartleson, K., Gajski, D. D., Rosenstiel, W., Flake, P. & Yasuura, H., 12 1 2000, Proceedings of the 2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000. p. 653-654 2 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

System-on-chip
1999
59 引用 (Scopus)

Real-Time Task Scheduling for a Variable Voltage Processor

Okuma, T., Ishihara, T. & Yasuura, H., 11 1 1999, Proceedings of the 12th International Symposium on System Synthesis, ISSS 1999. IEEE Computer Society, (Proceedings of the International Symposium on System Synthesis; 巻数 Part F129194).

研究成果: 著書/レポートタイプへの貢献会議での発言

Scheduling
Electric potential
Program processors
Energy utilization
1998

High-efficiency RF suppression circuit for fluorescent lamp inverters using charge pump and partial smoothing capacitors

Suzuki, F., Okino, K., Nishimura, Y., Yamazaki, H., Koizumi, H. & Yasuura, H., 1998, PESC Record - IEEE Annual Power Electronics Specialists Conference. Anon (版). 巻 2. p. 1733-1738 6 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Fluorescent lamps
Capacitors
Pumps
Networks (circuits)
Electric lamps
14 引用 (Scopus)

Instruction encoding techniques for area minimization of instruction ROM

Okuma, T., Tomiyama, H., Inoue, A., Fajar, E. & Yasuura, H., 12 2 1998, Proceedings of the 11th International Symposium on System Synthesis, ISSS 1998. Catthoor, F. (版). IEEE Computer Society, p. 125-130 6 p. (Proceedings of the International Symposium on System Synthesis; 巻数 Part F129250).

研究成果: 著書/レポートタイプへの貢献会議での発言

ROM
Embedded systems
Systems analysis
Data storage equipment
48 引用 (Scopus)

Novel test methodology for core-based system LSIs and a testing time minimization problem

Sugihara, M., Date, H. & Yasuura, H., 12 1 1998, IEEE International Test Conference (TC). Anon (版). p. 465-472 8 p. (IEEE International Test Conference (TC)).

研究成果: 著書/レポートタイプへの貢献会議での発言

Built-in self test
Testing
Combinatorial optimization
3 引用 (Scopus)

Statistical performance-driven module binding in high-level synthesis

Tomiyama, H., Inoue, A. & Yasuura, H., 12 2 1998, Proceedings of the 11th International Symposium on System Synthesis, ISSS 1998. IEEE Computer Society, 巻 Part F129250. p. 66-71 6 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Networks (circuits)
Clocks
Fabrication
High level synthesis
Costs
443 引用 (Scopus)

Voltage scheduling problem for dynamically variable voltage processors

Ishihara, T. & Yasuura, H., 1998, Proceedings of the International Symposium on Low Power Design. Anon (版). ACM, p. 197-202 6 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Scheduling
Electric potential
Application programs
Linear programming
Energy utilization
142 引用 (Scopus)

Voltage scheduling problem for dynamically variable voltage processors

Ishihara, T. & Yasuura, H., 1998, Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers. Anon (版). IEEE

研究成果: 著書/レポートタイプへの貢献会議での発言

Scheduling
Electric potential
Application programs
Linear programming
Energy utilization
1997

HW/SW co-design environment for multi-media equipments development using inverse problem

Suzuki, F., Koizumi, H., Hiramine, M., Yamamoto, K., Yasuura, H. & Okino, K., 1997, Hardware/Software Codesign - Proceedings of the International Workshop. Anon (版). IEEE, p. 153-157 5 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Inverse problems
Semiconductor materials
Television receivers
Numerical models
Hardware

Rapid prototyping method for top-down design of system-on-chip devices using LPGAs

Suzuki, F., Koizumi, H., Seo, K., Yasuura, H., Hiramine, M., Okino, K. & Or-Bach, Z., 1997, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. IEEE, p. 9-18 10 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Rapid prototyping
Lasers
Liquid crystal displays
Tuning
System-on-chip
1996
1 引用 (Scopus)

Basic experimentation on accuracy of power estimation for CMOS VLSI circuits

Ishihara, T. & Yasuura, H., 1996, International Symposium on Low Power Electronics and Design, Digest of Technical Papers. IEEE, p. 117-120 4 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

VLSI circuits
Energy dissipation
Electric power utilization
Microprocessor chips
Clocks

Basic experimentation on accuracy of power estimation for CMOS VLSI circuits

Ishihara, T. & Yasuura, H., 1996, IEEE Symposium on Low Power Electronics. Anon (版). IEEE, p. 117-120 4 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

VLSI circuits
Energy dissipation
Electric power utilization
Microprocessor chips
Clocks
11 引用 (Scopus)

Comparison of parallel multipliers with neuron MOS and CMOS technologies

Hirose, K. & Yasuura, H., 1996, IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings. IEEE, p. 488-491 4 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

MOSFET devices
Neurons
Logic circuits
Adders
Networks (circuits)

Optimal code placement of embedded software for instruction caches

Tomiyama, H. & Yasuura, H., 3 11 1996, Proceedings of the 1996 European Conference on Design and Test, EDTC 1996. Association for Computing Machinery, Inc, p. 96-101 6 p. 494132. (Proceedings of the 1996 European Conference on Design and Test, EDTC 1996).

研究成果: 著書/レポートタイプへの貢献会議での発言

Embedded software
Linear programming
1993
1 引用 (Scopus)

A micro-vectorprocessor Architecture - Performance Modeling and Benchmarking -

Hashimoto, T., Hironaka, T., Murakami, K. & Yasuura, H., 8 1 1993, Proceedings of the 7th International Conference on Supercomputing, ICS 1993. Association for Computing Machinery, p. 308-317 10 p. (Proceedings of the International Conference on Supercomputing; 巻数 Part F129670).

研究成果: 著書/レポートタイプへの貢献会議での発言

Benchmarking
Bandwidth
Data storage equipment
1992

A new VLSI algorithm for high throughput image filtering

Islam, F. F., Yasuura, H. & Tamaru, K., 1 1 1992, 1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992. Institute of Electrical and Electronics Engineers Inc., p. 2441-2444 4 p. 230523. (Proceedings - IEEE International Symposium on Circuits and Systems; 巻数 5).

研究成果: 著書/レポートタイプへの貢献会議での発言

Throughput
Masks
Pixels
Logic gates
1991

Locally computable coding for unary operations

Yasuura, H., 1 1 1991, Concurrency: Theory, Language, and Architecture - UK/Japan Workshop, Proceedings. Ito, T. & Yonezawa, A. (版). Springer Verlag, p. 312-323 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 491 LNCS).

研究成果: 著書/レポートタイプへの貢献会議での発言

Unary
State assignment
Redundancy
Coding
Parallel algorithms
1990
1 引用 (Scopus)

Extraction of functional information from combinational circuits

Ohmura, M., Yasuura, H. & Tamaru, K., 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. Publ by IEEE, p. 176-179 4 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Combinatorial circuits
Logic circuits
Networks (circuits)

Formal semantics of UDL/I and its applications to CAD/DA tools

Yasuura, H. & Ishiura, N., 9 1990, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. Publ by IEEE, p. 90-94 5 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Computer aided design
Semantics
Hardware
Computer hardware
Application specific integrated circuits
2 引用 (Scopus)

NES: The behavioral model for the formal semantics of a hardware design language UDL/I

Ishiura, N., Yasuura, H. & Yajima, S., 1990, 27th ACM/IEEE Design Automation Conference. Proceedings 1990. Publ by IEEE, p. 8-13 6 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Semantics
Hardware
Computer hardware description languages
1988
3 引用 (Scopus)

Parallel exhaustive search for several np-complete problems using content addressable memories

Yasuura, H., Tsujimoto, T. & Tamaru, K., 12 1 1988, Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, p. 333-336 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems; 巻数 1).

研究成果: 著書/レポートタイプへの貢献会議での発言

Associative storage
Parallel algorithms
Computational complexity
1985
3 引用 (Scopus)

HIGH-SPEED LOGIC SIMULATION ON A VECTOR PROCESSOR.

Ishiura, N., Yasuura, H., Kawata, T. & Yajima, S., 1985, Unknown Host Publication Title. IEEE, p. 119-121 3 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Logic design
Computer aided design
Pipelines
Simulators
Engines
9 引用 (Scopus)

On the area-time optimal design of l-selectors

Thompson, C. D. & Yasuura, H., 1 1 1985, Conference Record - 19th Asilomar Conference on Circuits, Systems and Computers, ACSSC 1985. Kirk, D. E. (版). IEEE Computer Society, p. 365-368 4 p. 671482. (Conference Record - Asilomar Conference on Signals, Systems and Computers).

研究成果: 著書/レポートタイプへの貢献会議での発言

Networks (circuits)
Optimal design
1984
18 引用 (Scopus)

ON PARALLEL COMPUTATIONAL COMPLEXITY OF UNIFICATION.

Yasuura, H., 1984, Unknown Host Publication Title. Ohmsha Ltd, p. 235-243 9 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Parallel algorithms
Computational complexity
Combinatorial circuits
Logic circuits
Polynomials
8 引用 (Scopus)

TIME FIRST EVALUATION ALGORITHM FOR HIGH-SPEED LOGIC SIMULATION.

Ishiura, N., Yasuura, H. & Yajima, S., 1984, Unknown Host Publication Title. IEEE, p. 197-199 3 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Networks (circuits)
1983

Hardware algorithms and logic design automation: An overview and progress report

Yajima, S. & Yasuura, H., 1 1 1983, RIMS Symposia on Software Science and Engineering - Proceedings. Nakajima, R., Nakata, I., Goto, E., Furukawa, K. & Yonezawa, A. (版). Springer Verlag, p. 147-164 18 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 147 LNCS).

研究成果: 著書/レポートタイプへの貢献会議での発言

Logic Design
Design Automation
Logic design
Hardware Design
Algorithm Design
1981
24 引用 (Scopus)

SCHEDULING OF PAGE-FETCHES IN JOIN OPERATIONS.

Merrett, T. H., Kambayashi, Y. & Yasuura, H., 1981, Very Large Data Bases, International Conference on Very Large Data Bases. IEEE Comput Soc Press (n 371), p. 488-498 11 p.

研究成果: 著書/レポートタイプへの貢献会議での発言

Scheduling