• 1905 引用
  • 19 h指数
1978 …2017

年単位の研究成果

Pureに変更を加えた場合、すぐここに表示されます。

研究成果

フィルター
Article
2012

A selective replacement method for timing-error-predicting flip-flops

Kunitake, Y., Sato, T., Yasuura, H. & Hayashida, T., 10 1 2012, : : Journal of Circuits, Systems and Computers. 21, 6, 1240013.

研究成果: Contribution to journalArticle

2011

Password based anonymous authentication with private information retrieval

Nakamura, T., Inenaga, S., Ikeda, D., Baba, K. & Yasuura, H., 4 1 2011, : : Journal of Digital Information Management. 9, 2, p. 72-78 7 p.

研究成果: Contribution to journalArticle

Short term cell-flipping technique for mitigating SNM degradation due to NBTI

Kunitake, Y., Sato, T. & Yasuura, H., 1 1 2011, : : IEICE Transactions on Electronics. E94-C, 4, p. 520-529 10 p.

研究成果: Contribution to journalArticle

1 引用 (Scopus)
2010

Code and data placement for embedded processors with scratchpad and cache memories

Ishitobi, Y., Ishihara, T. & Yasuura, H., 8 2010, : : Journal of Signal Processing Systems. 60, 2, p. 211-224 14 p.

研究成果: Contribution to journalArticle

9 引用 (Scopus)
2009

An optimization technique for low-energy embedded memory systems

Matsumura, T., Ishihara, T. & Yasuura, H., 12 1 2009, : : IPSJ Transactions on System LSI Design Methodology. 2, p. 239-249 11 p.

研究成果: Contribution to journalArticle

1 引用 (Scopus)

Enhancements of a circuit-level timing speculation technique and their evaluations using a co-simulation environment

Kunitake, Y., Mima, K., Sato, T. & Yasuura, H., 2009, : : IEICE Transactions on Electronics. E92-C, 4, p. 483-491 9 p.

研究成果: Contribution to journalArticle

1 引用 (Scopus)

Single-cycle-accessible two-level caches and compilation technique for energy reducion

Yamaguchi, S., Ishitobi, Y., Ishihara, T. & Yasuura, H., 12 1 2009, : : IPSJ Transactions on System LSI Design Methodology. 2, p. 189-199 11 p.

研究成果: Contribution to journalArticle

2008
1 引用 (Scopus)

A software technique to improve lifetime of caches containing ultra-leaky SRAM cells caused by within-die Vth variation

Goudarzi, M., Ishihara, T. & Yasuura, H., 12 1 2008, : : Microelectronics Journal. 39, 12, p. 1797-1808 12 p.

研究成果: Contribution to journalArticle

1 引用 (Scopus)
2005

Bitwidth optimization for low power digital FIR filter design

Tarumi, K., Hyodo, A., Muroyama, M. & Yasuura, H., 2005, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E88-A, 4, p. 869-875 7 p.

研究成果: Contribution to journalArticle

2004

A power reduction scheme for data buses by dynamic detection of active bits

Muroyama, M., Hyodo, A., Okuma, T. & Yasuura, H., 4 2004, : : IEICE Transactions on Electronics. E87-C, 4, p. 598-605 8 p.

研究成果: Contribution to journalArticle

2 引用 (Scopus)
2003

Pre-route power analysis techniques for SoC

Yamada, T., Sakamoto, T., Furuichi, S., Mukuno, M., Matsushita, Y. & Yasuura, H., 3 2003, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E86-A, 3, p. 686-692 7 p.

研究成果: Contribution to journalArticle

1 引用 (Scopus)

Reduction of Coupling Effects by Optimizing the 3-D Configuration of the Routing Grid

Sakai, A., Yamada, T., Matsushita, Y. & Yasuura, H., 10 2003, : : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11, 5, p. 951-954 4 p.

研究成果: Contribution to journalArticle

6 引用 (Scopus)

Routing Methodology for Minimizing Crosstalk in SoC

Yamada, T., Sakai, A., Matsushita, Y. & Yasuura, H., 9 2003, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E86-A, 9, p. 2347-2356 10 p.

研究成果: Contribution to journalArticle

1 引用 (Scopus)

Variable Pipeline Depth Processor for Energy Efficient Systems

Hyodo, A., Muroyama, M. & Yasuura, H., 12 2003, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E86-A, 12, p. 2983-2990 8 p.

研究成果: Contribution to journalArticle

1 引用 (Scopus)
2002
6 引用 (Scopus)

Memory organization for low-energy processor-based application-specific systems

Cao, Y. & Yasuura, H., 8 2002, : : IEICE Transactions on Electronics. E85-C, 8, p. 1616-1624 9 p.

研究成果: Contribution to journalArticle

Quality-driven design for video applications

Cao, Y. & Yasuura, H., 12 2002, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E85-A, 12, p. 2568-2576 9 p.

研究成果: Contribution to journalArticle

3 引用 (Scopus)
2001

Software energy reduction techniques for variable-voltage processors

Okuma, T., Yasuura, H. & Ishihara, T., 3 1 2001, : : IEEE Design and Test of Computers. 18, 2, p. 31-41 11 p.

研究成果: Contribution to journalArticle

25 引用 (Scopus)
1 引用 (Scopus)
2000

Flexible system LSI for embedded systems and its optimization techniques

Inoue, A., Ishihara, T. & Yasuura, H., 6 1 2000, : : Design Automation for Embedded Systems. 5, 2, p. 179-205 27 p.

研究成果: Contribution to journalArticle

2 引用 (Scopus)

Synthesis of minimum-cost multilevel logic networks via genetic algorithm

Shackleford, B., Okushi, E., Yasuda, M., Koizuml, H., Seo, K. & Yasuura, H., 12 2000, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E83-A, 12, p. 2528-2536 9 p.

研究成果: Contribution to journalArticle

System LSI design methods for low power LSIs

Yasuura, H. & Ishihara, T., 2000, : : IEICE Transactions on Electronics. E83-C, 2, p. 143-152 10 p.

研究成果: Contribution to journalArticle

4 引用 (Scopus)
1999
1 引用 (Scopus)

Educational results of hardware course with FPGAs

Sawada, S., Tomiyasu, H. & Yasuura, H., 3 1 1999, : : Research Reports on Information Science and Electrical Engineering of Kyushu University. 4, 1, p. 87-92 6 p.

研究成果: Contribution to journalArticle

1998

A module generator of 2-level neuron MOS circuits

Ike, K., Hirose, K. & Yasuura, H., 1 1 1998, : : Computers and Electrical Engineering. 24, 1-2, p. 33-41 9 p.

研究成果: Contribution to journalArticle

2 引用 (Scopus)

A test methodology for core-based system lsis

Sugihara, M., Date, H. & Yasuura, H., 1998, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E81-A, 12, p. 2640-2645 6 p.

研究成果: Contribution to journalArticle

7 引用 (Scopus)

Embedded system design using soft-core processor and Valen-C

Yasuura, H., Tomiyama, H., Inoue, A. & Eko Fajar, N., 9 1 1998, : : Journal of Information Science and Engineering. 14, 3, p. 587-603 17 p.

研究成果: Contribution to journalArticle

14 引用 (Scopus)
5 引用 (Scopus)

Language and compiler for optimizing datapath widths of embedded systems

Inoue, A., Tomiyama, H., Okuma, T., Kanbara, H. & Yasuura, H., 1998, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E81-A, 12, p. 2595-2604 10 p.

研究成果: Contribution to journalArticle

23 引用 (Scopus)

Module selection using manufacturing information

Tomiyama, H. & Yasuura, H., 1998, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E81-A, 12, p. 2576-2584 9 p.

研究成果: Contribution to journalArticle

3 引用 (Scopus)

Programmable power management architecture for power reduction

Ishihara, T. & Yasuura, H., 1 1 1998, : : IEICE Transactions on Electronics. E81-C, 9, p. 1473-1479 7 p.

研究成果: Contribution to journalArticle

8 引用 (Scopus)

Program slicing on vhdl descriptions and its evaluation

Ichinoset, S., Iwaihara, M. & Yasuura, H., 1998, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E81-A, 12, p. 2585-2594 10 p.

研究成果: Contribution to journalArticle

9 引用 (Scopus)

Soft-core processor architecture for embedded system design

Nurprasetyo, E. F., Inoue, A., Tomiyama, H. & Yasuura, H., 1998, : : IEICE Transactions on Electronics. E81-C, 9, p. 1416-1422 7 p.

研究成果: Contribution to journalArticle

17 引用 (Scopus)
1997

Code placement techniques for cache miss rate reduction

Tomiyama, H. & Yasuura, H., 1 1 1997, : : ACM Transactions on Design Automation of Electronic Systems. 2, 4, p. 410-429 20 p.

研究成果: Contribution to journalArticle

36 引用 (Scopus)

Embedded system cost optimization via data path width adjustment

Shackleford, B., Yasuda, M., Okushi, E., Koizumi, H., Tomiyama, H., Inoue, A. & Yasuura, H., 1 1 1997, : : IEICE Transactions on Information and Systems. E80-D, 10, p. 974-981 8 p.

研究成果: Contribution to journalArticle

6 引用 (Scopus)

On the computational power of binary decision diagram with redundant variables

Yamada, T. & Yasuura, H., 1996, : : Formal Methods in System Design. 8, 1, p. 65-89 25 p.

研究成果: Contribution to journalArticle

1 引用 (Scopus)

Satsuki: An integrated processor synthesis and compiler generation system

Shackleford, B., Yasuda, M., Okushi, E., Koizumi, H., Tomiyama, H. & Yasuura, H., 1 1 1996, : : IEICE Transactions on Information and Systems. E79-D, 10, p. 1373-1381 9 p.

研究成果: Contribution to journalArticle

11 引用 (Scopus)
1995

Proposal for a co-design method in control systems using combination of models

Koizumi, H., Seo, K., Suzuki, F., Ohtsuru, Y. & Yasuura, H., 3 1 1995, : : IEICE Transactions on Information and Systems. E78-D, 3, p. 237-247 11 p.

研究成果: Contribution to journalArticle

7 引用 (Scopus)
1994

Behavioral verification of cpus using functional information extraction

Ohmura, M., Tamaru, K. & Yasuura, H., 1994, : : Electronics and Communications in Japan (Part III: Fundamental Electronic Science). 77, 3, p. 52-61 10 p.

研究成果: Contribution to journalArticle

1993

Bit-parallel block-parallel functional memory type parallel processor architecture

Kobayashi, K., Tamaru, K., Yasuura, H. & Onodera, H., 7 1 1993, : : IEICE Transactions on Electronics. E76-C, 7, p. 1151-1158 8 p.

研究成果: Contribution to journalArticle

4 引用 (Scopus)

COACH: a computer aided design tool for computer architects

Akaboshi, H. & Yasura, H., 10 1993, : : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E76-A, 10, p. 1760-1769 10 p.

研究成果: Contribution to journalArticle

18 引用 (Scopus)
1991

Functional information extraction from combinational circuits

Ohmura, M., Yasuura, H. & Tamaru, K., 1 1 1991, : : Electronics and Communications in Japan (Part III: Fundamental Electronic Science). 74, 11, p. 28-38 11 p.

研究成果: Contribution to journalArticle

1990