This paper presents the first-ever 120 × 90 element thermoelectric infrared focal plane array (FPA) fabricated with CMOS technology. The device has a high responsivity of 3,900 V/W and a low cost potential. The overall chip size is 14.4 mm × 11.0 mm with a 12.0 mm × 9.0 mm imaging area. The device structure was optimized for a vacuum-sealed package. Each detector consists of two pairs of p-n polysilicon thermocouples and an NMOS transistor and has external dimensions of 100 μm × 100 μm and an internal electrical resistance of 90 kΩ. The precisely patterned Au-black infrared absorbing layer was achieved by both a low-pressure vapor deposition technique and a lift-off technique utilizing a PSG sacrificial layer. These techniques make it possible to obtain a Au-black pattern with the same degree of accuracy as with the CMOS process. The Au-black layer showed high absorptivity of more than 90 % to the light source with a wavelength of from 8 to 13 μm. This performance is suitable for consumer electronics as well as automotive applications.
|ジャーナル||Proceedings of SPIE - The International Society for Optical Engineering|
|出版ステータス||出版済み - 12 1 2002|
|イベント||Infrared Technology and Applications XXVIII - Seattle, WA, 米国|
継続期間: 7 7 2002 → 7 11 2002
All Science Journal Classification (ASJC) codes
- コンピュータ サイエンスの応用