A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers

Yuki Yamashita; Daisuke Kanemoto; Haruichi Kanaya; Ramesh Pokharel; Keiji Yoshida

doi:10.1109/RFIT.2012.6401672

A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers

Yuki Yamashita, Daisuke Kanemoto, Haruichi Kanaya, Ramesh Pokharel, Keiji Yoshida

研究成果: Chapter in Book/Report/Conference proceeding › Conference contribution

14 被引用数 (Scopus)

抄録

This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm². The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.

本文言語	英語
ホスト出版物のタイトル	Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012
ページ	237-239
ページ数	3
DOI	https://doi.org/10.1109/RFIT.2012.6401672
出版ステータス	出版済み - 2012
イベント	2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012 - Singapore, シンガポール継続期間: 11 21 2012 → 11 23 2012

その他

その他	2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012
国/地域	シンガポール
City	Singapore
Period	11/21/12 → 11/23/12

All Science Journal Classification (ASJC) codes

コンピュータネットワークおよび通信

文献へのアクセス

10.1109/RFIT.2012.6401672

他のファイルとリンク

引用スタイル

A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers. / Yamashita, Yuki; Kanemoto, Daisuke; Kanaya, Haruichi ; Pokharel, Ramesh; Yoshida, Keiji.

Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012. 2012. p. 237-239 6401672.

研究成果: Chapter in Book/Report/Conference proceeding › Conference contribution

Yamashita, Y, Kanemoto, D, Kanaya, H , Pokharel, R & Yoshida, K 2012, A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers. in Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012., 6401672, pp. 237-239, 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012, Singapore, シンガポール, 11/21/12. https://doi.org/10.1109/RFIT.2012.6401672

@inproceedings{fc24ed88c4e84d29b3880ccb77140461,

title = "A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers",

abstract = "This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm2. The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.",

author = "Yuki Yamashita and Daisuke Kanemoto and Haruichi Kanaya and Ramesh Pokharel and Keiji Yoshida",

year = "2012",

doi = "10.1109/RFIT.2012.6401672",

language = "English",

isbn = "9781467323048",

pages = "237--239",

booktitle = "Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012",

note = "2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012 ; Conference date: 21-11-2012 Through 23-11-2012",

}

TY - GEN

T1 - A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers

AU - Yamashita, Yuki

AU - Kanemoto, Daisuke

AU - Kanaya, Haruichi

AU - Pokharel, Ramesh

AU - Yoshida, Keiji

PY - 2012

Y1 - 2012

N2 - This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm2. The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.

AB - This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm2. The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.

UR - http://www.scopus.com/inward/record.url?scp=84873136065&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84873136065&partnerID=8YFLogxK

U2 - 10.1109/RFIT.2012.6401672

DO - 10.1109/RFIT.2012.6401672

M3 - Conference contribution

AN - SCOPUS:84873136065

SN - 9781467323048

SP - 237

EP - 239

BT - Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012

T2 - 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012

Y2 - 21 November 2012 through 23 November 2012

ER -

A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers

抄録

その他

All Science Journal Classification (ASJC) codes

文献へのアクセス

他のファイルとリンク

フィンガープリント

引用スタイル