A case study of Short Term Cell-Flipping technique for mitigating NBTI degradation on cache

Yuji Kunitake, Toshinori Sato, Hiroto Yasuura

研究成果: Chapter in Book/Report/Conference proceedingConference contribution

12 被引用数 (Scopus)

抄録

Negative Bias Temperature Instability (NBTI) is one of the major reliability problems in advanced technologies. NBTI causes threshold voltage shift in a PMOS transistor which is biased to negative voltage. In an SRAM cell, due to NBTI, threshold voltage shifts in the load transistors. The degradation has the impact on Static Noise Margin (SNM), which is a measure of read stability of a 6-T SRAM cell. Because an SRAM cell consists of two inverters, one of the load transistors is always stressed. In order to mitigate NBTI degradation, we proposed Short Term Cell-Flipping technique (STCF) for SRAM cell. This technique makes the stress probability on load transistors in an SRAM cell close to 50%. In this paper, we apply STCF technique to cache memories, and discuss its potential to mitigate NBTI degradation.

本文言語英語
ホスト出版物のタイトルProceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010
ページ301-307
ページ数7
DOI
出版ステータス出版済み - 2010
イベント2nd Asia Symposium on Quality Electronic Design, ASQED 2010 - Penang, マレーシア
継続期間: 8 3 20108 4 2010

その他

その他2nd Asia Symposium on Quality Electronic Design, ASQED 2010
Countryマレーシア
CityPenang
Period8/3/108/4/10

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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