A DC-2.5GHz voltage variable attenuator in 0.18-μm CMOS technology

I. L. Abdalla, A. Allam, Ramesh Pokharel, Hongting Jia

研究成果: Contribution to conferencePaper

1 引用 (Scopus)

抜粋

A CMOS variable voltage attenuator(VVA) with wide bandwidth has been designed and fabricated in a 0.18-μm CMOS process. Four bridge-T stages are cascaded to achieve 12 dB of dynamic range attenuation over a frequency range from DC up to 2.5 GHz. Cascaded bridge-T stages can be programmed to achieve the full scale attenuation and ensure good input and output matching. The design operates with 1.5-dB step size and with a maximum input power of -13 dBm in the entire frequency DC-2.5 GHz range. Worst case S11 is -11.5 dB across the frequency band. The design achieves an input third order intercept point (IIP3) of+31 dBm at maximum-attenuation.

元の言語英語
ページ352-355
ページ数4
DOI
出版物ステータス出版済み - 2 5 2015
イベント2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 - Ishigaki Island, Okinawa, 日本
継続期間: 11 17 201411 20 2014

その他

その他2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
日本
Ishigaki Island, Okinawa
期間11/17/1411/20/14

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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  • これを引用

    Abdalla, I. L., Allam, A., Pokharel, R., & Jia, H. (2015). A DC-2.5GHz voltage variable attenuator in 0.18-μm CMOS technology. 352-355. 論文発表場所 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki Island, Okinawa, 日本. https://doi.org/10.1109/APCCAS.2014.7032792