A new VLSI algorithm for high throughput image filtering

A new algorithm for multiplication-accumulation process, suitable for high throughput image filtering operation, is proposed. This algorithm exploits a-priori knowledge of filter masks. Note that, in the past, such a-priori knowledge have often been utilized for avoiding multiplications of pixels by zero elements present in a filter mask. However, the algorithm proposed in this work exploits a-priori knowledge of not only the zero elements of a filter mask, but also that of the zero-bit positions in each of its non-zero elements as well. This results in a throughput [=l/(Time interval between two output filtered pixels)] which is higher than other usual algorithms for multiplication accumulation used in image filtering. The VLSI architecture realizing the new algorithm is also proposed. Experimental result is provided considering a 5 × 5 filter mask. The result indicates 49% reduction in computation time while filtering a 512×512 pixel picture frame. This reduction is achieved without any additional requirement of VLSI layout area for logic gates.