A novel high-precision DAC utilizing tribonacci series

Kazuya Hokazono, Daisuke Kanemoto, Haruichi Kanaya, Ramesh Pokharel, Keiji Yoshida

研究成果: ジャーナルへの寄稿記事

抄録

A novel Digital-to-Analog Converter (DAC) utilizing Tribonacci Series is presented in this paper. The ratios of successive weights are smaller than those of binary DAC and larger than those of unary DAC. The proposed DAC has the features that the DNL can be superior to that of a binary DAC and the INL can be superior to that of a unary DAC. In the proposed DAC on a 0.18 μm CMOS process, the number of logic gates can be achieved an around 52% reduction compared to that of the unary DAC.

元の言語英語
ページ(範囲)515-521
ページ数7
ジャーナルIEICE Electronics Express
9
発行部数6
DOI
出版物ステータス出版済み - 3 25 2012

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digital to analog converters
Digital to analog conversion
Logic gates
logic
CMOS

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

これを引用

A novel high-precision DAC utilizing tribonacci series. / Hokazono, Kazuya; Kanemoto, Daisuke; Kanaya, Haruichi; Pokharel, Ramesh; Yoshida, Keiji.

:: IEICE Electronics Express, 巻 9, 番号 6, 25.03.2012, p. 515-521.

研究成果: ジャーナルへの寄稿記事

Hokazono, Kazuya ; Kanemoto, Daisuke ; Kanaya, Haruichi ; Pokharel, Ramesh ; Yoshida, Keiji. / A novel high-precision DAC utilizing tribonacci series. :: IEICE Electronics Express. 2012 ; 巻 9, 番号 6. pp. 515-521.
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