A novel high-precision DAC utilizing tribonacci series

Kazuya Hokazono, Daisuke Kanemoto, Haruichi Kanaya, Ramesh Pokharel, Keiji Yoshida

研究成果: Contribution to journalArticle査読

抄録

A novel Digital-to-Analog Converter (DAC) utilizing Tribonacci Series is presented in this paper. The ratios of successive weights are smaller than those of binary DAC and larger than those of unary DAC. The proposed DAC has the features that the DNL can be superior to that of a binary DAC and the INL can be superior to that of a unary DAC. In the proposed DAC on a 0.18µm CMOS process, the number of logic gates can be achieved an around 52% reduction compared to that of the unary DAC.
本文言語英語
ページ(範囲)515-521
ページ数7
ジャーナルIEICE Electronics Express
9
6
DOI
出版ステータス出版済み - 2012

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