A power reduction scheme for data buses by dynamic detection of active bits

M. Muroyama, A. Hyodo, T. Okuma, H. Yasuura

研究成果: Chapter in Book/Report/Conference proceedingConference contribution

2 被引用数 (Scopus)

抄録

To transfer a small number, we inherently need the small number of bits. But all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bits. In this paper, we propose a power reduction scheme for data buses using the active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate 20[%] - 35[%] on average and up to 54.2[%] switching activity reduction.

本文言語英語
ホスト出版物のタイトルProceedings - Euromicro Symposium on Digital System Design, DSD 2003
出版社Institute of Electrical and Electronics Engineers Inc.
ページ408-415
ページ数8
ISBN(電子版)0769520030, 9780769520032
DOI
出版ステータス出版済み - 2003
イベントEuromicro Symposium on Digital System Design, DSD 2003 - Belek-Antalya, トルコ
継続期間: 9 1 20039 6 2003

出版物シリーズ

名前Proceedings - Euromicro Symposium on Digital System Design, DSD 2003

その他

その他Euromicro Symposium on Digital System Design, DSD 2003
Countryトルコ
CityBelek-Antalya
Period9/1/039/6/03

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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