A system-level energy minimization approach using datapath width optimization

研究成果: 著書/レポートタイプへの貢献会議での発言

23 引用 (Scopus)

抄録

This paper presents a novel system-level approach that minimizes the energy consumption of embedded core-based systems through datapath width optimization. It is based on the idea of minimizing energy consumed by redundant bits, which are unused during execution of programs by means of optimizing the datapath width of processors. To minimize the redundant bits of variables in a given application program, the effective size of each variable is determined by variable size analysis, and Valen-C language is used to preserve the precision of computation. Analysis results of variables show that there are average 39% redundant bits in the C source program of MPEG-2 video decoder. In our experiments for several embedded applications, energy savings without performance penalty are reported range from about 10.8% to 48.3%.

元の言語英語
ホスト出版物のタイトルProceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers
ページ231-236
ページ数6
出版物ステータス出版済み - 2001
イベントInternational Symposium on Low Electronics and Design (ISLPED'01) - Huntington Beach, CA, 米国
継続期間: 8 6 20018 7 2001

その他

その他International Symposium on Low Electronics and Design (ISLPED'01)
米国
Huntington Beach, CA
期間8/6/018/7/01

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Electron energy levels
Application programs
Energy conservation
Energy utilization
Experiments

All Science Journal Classification (ASJC) codes

  • Engineering(all)

これを引用

Cao, Y., & Yasuura, H. (2001). A system-level energy minimization approach using datapath width optimization. : Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers (pp. 231-236)

A system-level energy minimization approach using datapath width optimization. / Cao, Y.; Yasuura, Hiroto.

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers. 2001. p. 231-236.

研究成果: 著書/レポートタイプへの貢献会議での発言

Cao, Y & Yasuura, H 2001, A system-level energy minimization approach using datapath width optimization. : Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers. pp. 231-236, International Symposium on Low Electronics and Design (ISLPED'01), Huntington Beach, CA, 米国, 8/6/01.
Cao Y, Yasuura H. A system-level energy minimization approach using datapath width optimization. : Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers. 2001. p. 231-236
Cao, Y. ; Yasuura, Hiroto. / A system-level energy minimization approach using datapath width optimization. Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers. 2001. pp. 231-236
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