抄録
This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology and system-on-chip have resulted in a considerable portion of power consumption on buses, in which the major sources of the power consumption are the transition activities on the signal lines and the coupling capacitances of the lines. In addition, we enter an era of considering variation of the effective coupling capacitances. We address power reduction including these phenomena by using variable length coding. Experimental results show the effectiveness of our methodology.
| 元の言語 | 英語 |
|---|---|
| ホスト出版物のタイトル | Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 |
| ページ | 557-560 |
| ページ数 | 4 |
| 出版物ステータス | 出版済み - 12 1 2005 |
| イベント | 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Shanghai, 中国 継続期間: 1 18 2005 → 1 21 2005 |
出版物シリーズ
| 名前 | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC |
|---|---|
| 巻 | 1 |
その他
| その他 | 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 |
|---|---|
| 国 | 中国 |
| 市 | Shanghai |
| 期間 | 1/18/05 → 1/21/05 |
Fingerprint
All Science Journal Classification (ASJC) codes
- Computer Science Applications
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering
これを引用
A variation-aware low-power coding methodology for tightly coupled buses. / Muroyama, Masanori; Tarumi, Kosuke; Makiyama, Koji; Yasuura, Hiroto.
Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005. 2005. p. 557-560 1466226 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 巻 1).研究成果: 著書/レポートタイプへの貢献 › 会議での発言
}
TY - GEN
T1 - A variation-aware low-power coding methodology for tightly coupled buses
AU - Muroyama, Masanori
AU - Tarumi, Kosuke
AU - Makiyama, Koji
AU - Yasuura, Hiroto
PY - 2005/12/1
Y1 - 2005/12/1
N2 - This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology and system-on-chip have resulted in a considerable portion of power consumption on buses, in which the major sources of the power consumption are the transition activities on the signal lines and the coupling capacitances of the lines. In addition, we enter an era of considering variation of the effective coupling capacitances. We address power reduction including these phenomena by using variable length coding. Experimental results show the effectiveness of our methodology.
AB - This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology and system-on-chip have resulted in a considerable portion of power consumption on buses, in which the major sources of the power consumption are the transition activities on the signal lines and the coupling capacitances of the lines. In addition, we enter an era of considering variation of the effective coupling capacitances. We address power reduction including these phenomena by using variable length coding. Experimental results show the effectiveness of our methodology.
UR - http://www.scopus.com/inward/record.url?scp=84861436850&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84861436850&partnerID=8YFLogxK
M3 - Conference contribution
SN - 0780387368
SN - 9780780387362
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 557
EP - 560
BT - Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
ER -