In this paper, we discuss on accuracy of several kinds of power dissipation model for CMOS VLSI circuits. Some researchers have proposed several efficient power estimation methods for CMOS circuits . However, we do not know how accurate they are because we have not established a method to compare the estimated results of power consumption with that of actual VLSI chip. To evaluate the accuracy of several kind of power dissipation model such as chip-level, block-level and gate-level etc., we examined as follows: (i) Measuring power consumption of actual microprocessors. (ii) Estimating power consumption with several kinds of power dissipation model. (iii) Comparing (i) with (ii). The experimental results show as follows: (1) Power estimation at gate level is accurate enough. (2) Estimating power of a clock tree independently makes estimation more accurate.
|出版ステータス||出版済み - 12 1 1996|
|イベント||Proceedings of the 1996 International Symposium on Low Power Electronics and Design - Monterey, CA, USA|
継続期間: 8 12 1996 → 8 14 1996
|その他||Proceedings of the 1996 International Symposium on Low Power Electronics and Design|
|City||Monterey, CA, USA|
|Period||8/12/96 → 8/14/96|
All Science Journal Classification (ASJC) codes