Demonstration of an Energy-Efficient, Gate-Level-Pipelined 100 TOPS/W Arithmetic Logic Unit Based on Low-Voltage Rapid Single-Flux-Quantum Logic

Ikki Nagaoka, Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita, Akira Fujimaki, Koji Inoue

研究成果: Chapter in Book/Report/Conference proceedingConference contribution

抜粋

We report the successful operation of an energy-efficient 8-bit arithmetic logic unit (ALU) based on bit-parallel, gate-Ievel-pipelining, and low-voltage rapid single-flux-quantum (LV-RSFQ) approaches. We implemented the ALU using a 10-kA/cm2 Nb process. The bias voltage was optimized to obtain high energy efficiency. Although lowed bias voltage leads to difficulty in timing design, we solved the problem by precise timing control. The operating frequency reached 30 GHz. Thanks to these high-throughput and low-energy technologies, we realized highly energy-efficient operation over 100 tera-operations per second per watt (TOPS/W).

元の言語英語
ホスト出版物のタイトルISEC 2019 - International Superconductive Electronics Conference
出版者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781728111964
DOI
出版物ステータス出版済み - 7 2019
イベント17th IEEE International Superconductive Electronics Conference, ISEC 2019 - Riverside, 米国
継続期間: 7 28 20198 1 2019

出版物シリーズ

名前ISEC 2019 - International Superconductive Electronics Conference

会議

会議17th IEEE International Superconductive Electronics Conference, ISEC 2019
米国
Riverside
期間7/28/198/1/19

All Science Journal Classification (ASJC) codes

  • Fluid Flow and Transfer Processes
  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

フィンガープリント Demonstration of an Energy-Efficient, Gate-Level-Pipelined 100 TOPS/W Arithmetic Logic Unit Based on Low-Voltage Rapid Single-Flux-Quantum Logic' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。

  • これを引用

    Nagaoka, I., Tanaka, M., Sano, K., Yamashita, T., Fujimaki, A., & Inoue, K. (2019). Demonstration of an Energy-Efficient, Gate-Level-Pipelined 100 TOPS/W Arithmetic Logic Unit Based on Low-Voltage Rapid Single-Flux-Quantum Logic. : ISEC 2019 - International Superconductive Electronics Conference [8990905] (ISEC 2019 - International Superconductive Electronics Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISEC46533.2019.8990905