Design and Application of Virtual Inductance of Square-Shaped Defected Ground Structure in 0.18-$\mu \text{m}$ CMOS Technology

Nusrat Jahan, Siti Amalina Enche Ab Rahim, Adel Barakat, Takana Kaho, Ramesh K. Pokharel

研究成果: Contribution to journalArticle査読

12 被引用数 (Scopus)

抄録

This paper investigates a possibility of application of a virtual inductor realized by an integrated defected ground structure (DGS) to design a front-end circuit in CMOS technology. Two types of DGS are analyzed and found that the inductance realized by a square-shaped DGS achieves smaller size and higher quality factor than an H-shaped DGS. Then, a 15-GHz low phase noise voltage-controlled oscillator (VCO) employing the proposed square-shaped DGS in 0.18-$\mu \text{m}$ 1P6M CMOS technology is designed. The fabricated VCO operates from 15.2 to 16.12 GHz and consumes 5-mW power. The measured phase noise is-132.08 dBc/Hz at 10-MHz offset frequency, and this results in the figure of merit (FoM) and FoM taking account of the area to be 189.1 and 199.9 dB, respectively.

本文言語英語
論文番号7984797
ページ(範囲)299-305
ページ数7
ジャーナルIEEE Journal of the Electron Devices Society
5
5
DOI
出版ステータス出版済み - 9 2017

All Science Journal Classification (ASJC) codes

  • バイオテクノロジー
  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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