Design of a Library for DRAM Power Reduction in an Embedded Multi-task Kernel

Satomi Kobayashi, Akira Fukuda

研究成果: Contribution to conferencePaper査読

抄録

This paper proposes a memory management library for DRAM power reduction cooperated with the scheduler in an embedded operating system. The main memory DRAMs have multi power mode status and consist of banks which are smaller in size than their total capacity. Their electrical power can be controlled with the unit of banks to perform read and write transactions. We study a method of dynamic power reduction in DRAMs without having to depend on any dedicated hardware. Simulation results explain good performance of our method with the algorithm of a minimum cost flow problem.

本文言語英語
ページ5-8
ページ数4
出版ステータス出版済み - 2003
イベント2003 IEEE Pacific Rim Conference on Communications Computers and Signal Processing (PACRIM 2003) - Victoria, B.C., カナダ
継続期間: 8 28 20038 30 2003

その他

その他2003 IEEE Pacific Rim Conference on Communications Computers and Signal Processing (PACRIM 2003)
Countryカナダ
CityVictoria, B.C.
Period8/28/038/30/03

All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Computer Networks and Communications

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