Development of 13 bit digitally controlled oscillator using fibonacci sequence in 0.18 um CMOS process

M. Ishihara, R. K. Pokharel, A. Tomar, D. Kanemoto, H. Kanaya, K. Yoshida

研究成果: 著書/レポートタイプへの貢献会議での発言

抜粋

This paper presents a digitally controlled oscillator (DCO) in Inductor-Capacitor (LC) topology with an enhanced frequency-steps and power consumption. Using special Fibonacci sequence method for optimizing capacitor sizes, this digitally-controlled oscillator (DCO) realizes frequency-tuning steps superior than a conventional DCO using binary sequence without increasing the power consumption. The proposed circuit is implemented in 0.18 um CMOS technology and tested. It has a center frequency of 7.9 GHz. The measured phase noise is 117.1 dBc/Hz(@1MHz offset) at carrier frequency of 7.7 GHz.

元の言語英語
ホスト出版物のタイトルAsia-Pacific Microwave Conference Proceedings, APMC 2011
ページ1634-1637
ページ数4
出版物ステータス出版済み - 12 1 2011
イベントAsia-Pacific Microwave Conference, APMC 2011 - Melbourne, VIC, オーストラリア
継続期間: 12 5 201112 8 2011

出版物シリーズ

名前Asia-Pacific Microwave Conference Proceedings, APMC

その他

その他Asia-Pacific Microwave Conference, APMC 2011
オーストラリア
Melbourne, VIC
期間12/5/1112/8/11

    フィンガープリント

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

これを引用

Ishihara, M., Pokharel, R. K., Tomar, A., Kanemoto, D., Kanaya, H., & Yoshida, K. (2011). Development of 13 bit digitally controlled oscillator using fibonacci sequence in 0.18 um CMOS process. : Asia-Pacific Microwave Conference Proceedings, APMC 2011 (pp. 1634-1637). [6174080] (Asia-Pacific Microwave Conference Proceedings, APMC).