抄録
This paper presents the design of a highly efficient push-pull power amplifier (PA) for 5.2 GHz band in a 0.18-μm CMOS technology. This PA assumes 802.11ac, which requires linearity, and enables high-speed communication. In this PA, center tapped transformer designed using a 0.18-μm CMOS technology is used. PA had been simulated and measured. The proposed PA has a simulated power-added efficiency (PAE) in the linear operation of 15.7 %, maximum PAE of 30.9 % at 5.2 GHz.
| 元の言語 | 英語 |
|---|---|
| ホスト出版物のタイトル | 2017 IEEE 19th Electronics Packaging Technology Conference, EPTC 2017 |
| 出版者 | Institute of Electrical and Electronics Engineers Inc. |
| ページ | 1-4 |
| ページ数 | 4 |
| ISBN（電子版） | 9781538630426 |
| DOI | |
| 出版物ステータス | 出版済み - 1 31 2018 |
| イベント | 2017 19th IEEE Electronics Packaging Technology Conference, EPTC 2017 - Singapore, シンガポール 継続期間: 12 6 2017 → 12 9 2017 |
出版物シリーズ
| 名前 | 2017 IEEE 19th Electronics Packaging Technology Conference, EPTC 2017 |
|---|---|
| 巻 | 2018-February |
その他
| その他 | 2017 19th IEEE Electronics Packaging Technology Conference, EPTC 2017 |
|---|---|
| 国 | シンガポール |
| 市 | Singapore |
| 期間 | 12/6/17 → 12/9/17 |
Fingerprint
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials
- Metals and Alloys
- Polymers and Plastics
これを引用
Development of highly efficient push-pull power amplifier with center tapped transformer for 5GHz application. / Sadakiyo, Tomoki; Kanaya, Haruichi.
2017 IEEE 19th Electronics Packaging Technology Conference, EPTC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-4 (2017 IEEE 19th Electronics Packaging Technology Conference, EPTC 2017; 巻 2018-February).研究成果: 著書/レポートタイプへの貢献 › 会議での発言
}
TY - GEN
T1 - Development of highly efficient push-pull power amplifier with center tapped transformer for 5GHz application
AU - Sadakiyo, Tomoki
AU - Kanaya, Haruichi
PY - 2018/1/31
Y1 - 2018/1/31
N2 - This paper presents the design of a highly efficient push-pull power amplifier (PA) for 5.2 GHz band in a 0.18-μm CMOS technology. This PA assumes 802.11ac, which requires linearity, and enables high-speed communication. In this PA, center tapped transformer designed using a 0.18-μm CMOS technology is used. PA had been simulated and measured. The proposed PA has a simulated power-added efficiency (PAE) in the linear operation of 15.7 %, maximum PAE of 30.9 % at 5.2 GHz.
AB - This paper presents the design of a highly efficient push-pull power amplifier (PA) for 5.2 GHz band in a 0.18-μm CMOS technology. This PA assumes 802.11ac, which requires linearity, and enables high-speed communication. In this PA, center tapped transformer designed using a 0.18-μm CMOS technology is used. PA had been simulated and measured. The proposed PA has a simulated power-added efficiency (PAE) in the linear operation of 15.7 %, maximum PAE of 30.9 % at 5.2 GHz.
UR - http://www.scopus.com/inward/record.url?scp=85050631061&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85050631061&partnerID=8YFLogxK
U2 - 10.1109/EPTC.2017.8277476
DO - 10.1109/EPTC.2017.8277476
M3 - Conference contribution
T3 - 2017 IEEE 19th Electronics Packaging Technology Conference, EPTC 2017
SP - 1
EP - 4
BT - 2017 IEEE 19th Electronics Packaging Technology Conference, EPTC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
ER -