抄録
We study the electrical properties of pseudo-single-crystalline Ge (PSC-Ge) films grown by a Au-induced layer exchange crystallization method at 250 °C. By inserting the SiNx layer between PSC-Ge and SiO2, we initiatively suppress the influence of the Ge/SiO2 interfacial defective layers, which have been reported in our previous works, on the electrical properties of the PSC-Ge layers. As a result, we can detect the influence of the ionized Au+ donors on the temperature-dependent hole concentration and Hall mobility. To further examine their electrical properties in detail, we also fabricate p-thin-film transistors (TFTs) with the PSC-Ge layer. Although the off-state leakage currents are suppressed by inserting the SiNx layer, the value of on/off ratio remains poor (<102). Even after the post-annealing at 400 °C for the TFTs, the on/off ratio is still poor (∼102) because of the gate-induced drain leakage current although a nominal field effect mobility is enhanced up to ∼25 cm2/V s. Considering these features, we conclude that the Au contaminations into the PSC-Ge layer can affect the electrical properties and device performances despite a low-growth temperature of 250 °C. To achieve further high-performance p-TFTs, we have to suppress the Au contaminations into PSC-Ge during the Au-induced crystallization growth.
| 元の言語 | 英語 |
|---|---|
| 記事番号 | 215704 |
| ジャーナル | Journal of Applied Physics |
| 巻 | 123 |
| 発行部数 | 21 |
| DOI | |
| 出版物ステータス | 出版済み - 6 7 2018 |
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All Science Journal Classification (ASJC) codes
- Physics and Astronomy(all)
これを引用
Electrical properties of pseudo-single-crystalline Ge films grown by Au-induced layer exchange crystallization at 250 °c. / Higashi, H.; Kudo, K.; Yamamoto, Keisuke; Yamada, S.; Kanashima, T.; Tsunoda, I.; Nakashima, Hiroshi; Hamaya, K.
：: Journal of Applied Physics, 巻 123, 番号 21, 215704, 07.06.2018.研究成果: ジャーナルへの寄稿 › 記事
}
TY - JOUR
T1 - Electrical properties of pseudo-single-crystalline Ge films grown by Au-induced layer exchange crystallization at 250 °c
AU - Higashi, H.
AU - Kudo, K.
AU - Yamamoto, Keisuke
AU - Yamada, S.
AU - Kanashima, T.
AU - Tsunoda, I.
AU - Nakashima, Hiroshi
AU - Hamaya, K.
PY - 2018/6/7
Y1 - 2018/6/7
N2 - We study the electrical properties of pseudo-single-crystalline Ge (PSC-Ge) films grown by a Au-induced layer exchange crystallization method at 250 °C. By inserting the SiNx layer between PSC-Ge and SiO2, we initiatively suppress the influence of the Ge/SiO2 interfacial defective layers, which have been reported in our previous works, on the electrical properties of the PSC-Ge layers. As a result, we can detect the influence of the ionized Au+ donors on the temperature-dependent hole concentration and Hall mobility. To further examine their electrical properties in detail, we also fabricate p-thin-film transistors (TFTs) with the PSC-Ge layer. Although the off-state leakage currents are suppressed by inserting the SiNx layer, the value of on/off ratio remains poor (<102). Even after the post-annealing at 400 °C for the TFTs, the on/off ratio is still poor (∼102) because of the gate-induced drain leakage current although a nominal field effect mobility is enhanced up to ∼25 cm2/V s. Considering these features, we conclude that the Au contaminations into the PSC-Ge layer can affect the electrical properties and device performances despite a low-growth temperature of 250 °C. To achieve further high-performance p-TFTs, we have to suppress the Au contaminations into PSC-Ge during the Au-induced crystallization growth.
AB - We study the electrical properties of pseudo-single-crystalline Ge (PSC-Ge) films grown by a Au-induced layer exchange crystallization method at 250 °C. By inserting the SiNx layer between PSC-Ge and SiO2, we initiatively suppress the influence of the Ge/SiO2 interfacial defective layers, which have been reported in our previous works, on the electrical properties of the PSC-Ge layers. As a result, we can detect the influence of the ionized Au+ donors on the temperature-dependent hole concentration and Hall mobility. To further examine their electrical properties in detail, we also fabricate p-thin-film transistors (TFTs) with the PSC-Ge layer. Although the off-state leakage currents are suppressed by inserting the SiNx layer, the value of on/off ratio remains poor (<102). Even after the post-annealing at 400 °C for the TFTs, the on/off ratio is still poor (∼102) because of the gate-induced drain leakage current although a nominal field effect mobility is enhanced up to ∼25 cm2/V s. Considering these features, we conclude that the Au contaminations into the PSC-Ge layer can affect the electrical properties and device performances despite a low-growth temperature of 250 °C. To achieve further high-performance p-TFTs, we have to suppress the Au contaminations into PSC-Ge during the Au-induced crystallization growth.
UR - http://www.scopus.com/inward/record.url?scp=85048340482&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85048340482&partnerID=8YFLogxK
U2 - 10.1063/1.5031469
DO - 10.1063/1.5031469
M3 - Article
AN - SCOPUS:85048340482
VL - 123
JO - Journal of Applied Physics
JF - Journal of Applied Physics
SN - 0021-8979
IS - 21
M1 - 215704
ER -