Estimation of frequency, power and phase using modified digital phase locked loop

M. Saber, Y. Jitsumatsu, M. T.A. Khan

研究成果: 著書/レポートタイプへの貢献会議での発言

1 引用 (Scopus)

抄録

This paper presents a method which can estimate frequency, power and phase of received signal corrupted with additive white Gaussian noise (AWGN) in large frequency offset environment. Proposed method consists of two loops, each loop is similar to a phase-locked loop (PLL). Proposed structure solves the problems of conventional PLL such as limited estimation range, long settling time, overshoot, high frequency ripples and instability. Traditional inability of PLL to synchronize signals with large frequency offset is also removed in this method. Furthermore, proposed architecture along with providing stability, ensures fast tracking of any changes in input frequency. Proposed method is also implemented using field programmable gate array (FPGA), it consumes 201 mW and works at 197 MHz.

元の言語英語
ホスト出版物のタイトル2012 International Conference on Systems and Informatics, ICSAI 2012
ページ1601-1605
ページ数5
DOI
出版物ステータス出版済み - 7 30 2012
イベント2012 International Conference on Systems and Informatics, ICSAI 2012 - Yantai, 中国
継続期間: 5 19 20125 20 2012

出版物シリーズ

名前2012 International Conference on Systems and Informatics, ICSAI 2012

その他

その他2012 International Conference on Systems and Informatics, ICSAI 2012
中国
Yantai
期間5/19/125/20/12

Fingerprint

Phase locked loops
Field programmable gate arrays (FPGA)

All Science Journal Classification (ASJC) codes

  • Information Systems

これを引用

Saber, M., Jitsumatsu, Y., & Khan, M. T. A. (2012). Estimation of frequency, power and phase using modified digital phase locked loop. : 2012 International Conference on Systems and Informatics, ICSAI 2012 (pp. 1601-1605). [6223346] (2012 International Conference on Systems and Informatics, ICSAI 2012). https://doi.org/10.1109/ICSAI.2012.6223346

Estimation of frequency, power and phase using modified digital phase locked loop. / Saber, M.; Jitsumatsu, Y.; Khan, M. T.A.

2012 International Conference on Systems and Informatics, ICSAI 2012. 2012. p. 1601-1605 6223346 (2012 International Conference on Systems and Informatics, ICSAI 2012).

研究成果: 著書/レポートタイプへの貢献会議での発言

Saber, M, Jitsumatsu, Y & Khan, MTA 2012, Estimation of frequency, power and phase using modified digital phase locked loop. : 2012 International Conference on Systems and Informatics, ICSAI 2012., 6223346, 2012 International Conference on Systems and Informatics, ICSAI 2012, pp. 1601-1605, 2012 International Conference on Systems and Informatics, ICSAI 2012, Yantai, 中国, 5/19/12. https://doi.org/10.1109/ICSAI.2012.6223346
Saber M, Jitsumatsu Y, Khan MTA. Estimation of frequency, power and phase using modified digital phase locked loop. : 2012 International Conference on Systems and Informatics, ICSAI 2012. 2012. p. 1601-1605. 6223346. (2012 International Conference on Systems and Informatics, ICSAI 2012). https://doi.org/10.1109/ICSAI.2012.6223346
Saber, M. ; Jitsumatsu, Y. ; Khan, M. T.A. / Estimation of frequency, power and phase using modified digital phase locked loop. 2012 International Conference on Systems and Informatics, ICSAI 2012. 2012. pp. 1601-1605 (2012 International Conference on Systems and Informatics, ICSAI 2012).
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