Functional memory type parallel processor architecture for solving combinational problems

Hiroto Yasuura, Taizou Tsujimoto, Keikichi Tamaru

研究成果: Contribution to journalArticle査読

抄録

We propose a new parallel processor architecture which is suitable for use with current VLSI technology. We term this architecture FMPP (Functional Memory type Parallel Processor architecture). The integration density of this architecture can be increased in accordance with the regular nature of its structure in a manner similar to memory chips. We regard the simple logic function equivalent to the roughly 100 transistors of each RAM word added, as a l-word bit serial processor. We take the memory to be an SIMD parallel computer system consisting of simple processors for many numbers as there are RAM words. This architecture implements a simple parallel algorithm for solving several combinational problems and combinational optimization problems. We call this algorithm a parallel exhaustive search (PRE).

本文言語英語
ページ(範囲)23-31
ページ数9
ジャーナルElectronics and Communications in Japan, Part III: Fundamental Electronic Science (English translation of Denshi Tsushin Gakkai Ronbunshi)
73
1
出版ステータス出版済み - 1 1990
外部発表はい

All Science Journal Classification (ASJC) codes

  • 電子工学および電気工学

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