High-performance Ge metal-oxide-semiconductor field-effect transistors with a gate stack fabricated by ultrathin SiO2/GeO2 bilayer passivation

Keisuke Yamamoto, Ryuji Ueno, Takeshi Yamanaka, Kana Hirayama, Haigui Yang, Dong Wang, Hiroshi Nakashima

研究成果: ジャーナルへの寄稿記事

29 引用 (Scopus)

抄録

We fabricated Ge n-and p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with (100) surface orientation by the gate-last process. The source/drain junctions for n-and p-MOSFETs were fabricated by thermal diffusion of P and ion implantation of B, respectively, which indicated high on/off ratios. An ultrathin SiO2/GeO2 interlayer was used for fabricating the gate stack. The fabricated MOSFETs showed excellent electrical characteristics with a low interface state density. The peak electron and hole mobilities were 1097 and 376 cm2 V-1 s -1, respectively, despite the very thin GeO2 thickness (2 nm). These are 1.5-1.6 times higher than those of Si MOSFETs.

元の言語英語
ジャーナルApplied Physics Express
4
発行部数5
DOI
出版物ステータス出版済み - 5 1 2011

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MOSFET devices
Passivation
metal oxide semiconductors
passivity
field effect transistors
Hole mobility
Thermal diffusion
Interface states
Electron mobility
hole mobility
thermal diffusion
electron mobility
Ion implantation
ion implantation
interlayers
implantation

All Science Journal Classification (ASJC) codes

  • Engineering(all)
  • Physics and Astronomy(all)

これを引用

High-performance Ge metal-oxide-semiconductor field-effect transistors with a gate stack fabricated by ultrathin SiO2/GeO2 bilayer passivation. / Yamamoto, Keisuke; Ueno, Ryuji; Yamanaka, Takeshi; Hirayama, Kana; Yang, Haigui; Wang, Dong; Nakashima, Hiroshi.

:: Applied Physics Express, 巻 4, 番号 5, 01.05.2011.

研究成果: ジャーナルへの寄稿記事

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AU - Yamamoto, Keisuke

AU - Ueno, Ryuji

AU - Yamanaka, Takeshi

AU - Hirayama, Kana

AU - Yang, Haigui

AU - Wang, Dong

AU - Nakashima, Hiroshi

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