TY - JOUR
T1 - Large single-crystal Ge-on-insulator by thermally-assisted (~400 °C) Si-seeded-pulse-laser annealing
AU - Sadoh, T.
AU - Kurosawa, M.
AU - Heya, A.
AU - Matsuo, N.
AU - Miyao, M.
N1 - Funding Information:
The authors wish to thank Dr. I. Mizushima of Toshiba Corporation for stimulating discussions during the course of this study, and Prof. T. Asano and Dr. G. Nakagawa of Kyushu University for providing opportunity of the use of EBSD analysis system. A part of this work was supported by Grant-in-Aid (25289089, 26630133, 15H03976, 16K14234) for Scientific Research from the Ministry of Education, Culture, Sports, Science and Technology in Japan, and JSPS Core-to-Core Program, A. Advanced Research Networks.
Publisher Copyright:
© 2016 Elsevier Ltd
PY - 2017/11/1
Y1 - 2017/11/1
N2 - Low temperature (≤400 °C) formation of orientation-controlled large (≥10 µm) Ge-on-insulator (GOI) structures is desired to fabricate 3-dimensional large-scale integrated circuits (LSIs), where Ge-based functional devices are stacked on Si-LSIs. For this purpose, Si-seeded pulse-laser annealing (PLA) combined with low-temperature substrate heating (≤400 °C) has been developed. Here, a-Ge stripes on Si substrates partially covered with insulating films are subjected to PLA, where single edges of the a-Ge stripes directly contact Si-seeding substrates through opening windows of insulating films. PLA at room temperature generates lateral growth of Ge layers from Si-seeding substrates. However, the growth length is short (~1 µm), which is attributed to very short melting time. To increase the melting time, low-temperature (≤400 °C) substrate heating during PLA is examined. As a result, very large (~20 µm) orientation-controlled GOI is obtained by combining substrate heating (400 °C) with PLA. Detailed electron microscopy analysis reveals very high crystallinity of the grown layers. Consequently, high-quality rapid-melting growth of Ge becomes possible at a low processing temperature of ~400 °C. This thermally-assisted (~400 °C) Si-seeded PLA will facilitate realization of 3-dimensional LSIs.
AB - Low temperature (≤400 °C) formation of orientation-controlled large (≥10 µm) Ge-on-insulator (GOI) structures is desired to fabricate 3-dimensional large-scale integrated circuits (LSIs), where Ge-based functional devices are stacked on Si-LSIs. For this purpose, Si-seeded pulse-laser annealing (PLA) combined with low-temperature substrate heating (≤400 °C) has been developed. Here, a-Ge stripes on Si substrates partially covered with insulating films are subjected to PLA, where single edges of the a-Ge stripes directly contact Si-seeding substrates through opening windows of insulating films. PLA at room temperature generates lateral growth of Ge layers from Si-seeding substrates. However, the growth length is short (~1 µm), which is attributed to very short melting time. To increase the melting time, low-temperature (≤400 °C) substrate heating during PLA is examined. As a result, very large (~20 µm) orientation-controlled GOI is obtained by combining substrate heating (400 °C) with PLA. Detailed electron microscopy analysis reveals very high crystallinity of the grown layers. Consequently, high-quality rapid-melting growth of Ge becomes possible at a low processing temperature of ~400 °C. This thermally-assisted (~400 °C) Si-seeded PLA will facilitate realization of 3-dimensional LSIs.
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U2 - 10.1016/j.mssp.2016.10.033
DO - 10.1016/j.mssp.2016.10.033
M3 - Article
AN - SCOPUS:85005896278
VL - 70
SP - 8
EP - 11
JO - Materials Science in Semiconductor Processing
JF - Materials Science in Semiconductor Processing
SN - 1369-8001
ER -