Low temperature (≤400 °C) formation of orientation-controlled large (≥10 µm) Ge-on-insulator (GOI) structures is desired to fabricate 3-dimensional large-scale integrated circuits (LSIs), where Ge-based functional devices are stacked on Si-LSIs. For this purpose, Si-seeded pulse-laser annealing (PLA) combined with low-temperature substrate heating (≤400 °C) has been developed. Here, a-Ge stripes on Si substrates partially covered with insulating films are subjected to PLA, where single edges of the a-Ge stripes directly contact Si-seeding substrates through opening windows of insulating films. PLA at room temperature generates lateral growth of Ge layers from Si-seeding substrates. However, the growth length is short (~1 µm), which is attributed to very short melting time. To increase the melting time, low-temperature (≤400 °C) substrate heating during PLA is examined. As a result, very large (~20 µm) orientation-controlled GOI is obtained by combining substrate heating (400 °C) with PLA. Detailed electron microscopy analysis reveals very high crystallinity of the grown layers. Consequently, high-quality rapid-melting growth of Ge becomes possible at a low processing temperature of ~400 °C. This thermally-assisted (~400 °C) Si-seeded PLA will facilitate realization of 3-dimensional LSIs.
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