Leakage Power Reduction for Battery-Operated Portable Systems

研究成果: ジャーナルへの寄稿記事

抄録

This paper addresses bitwidth optimization focusing on leakage power reduction for system-level low-power design. By means of tuning the design parameter, bitwidth tailored to a given application requirements, the datapath width of processors and size of memories are optimized resulting in significant leakage power reduction besides dynamic power reduction. Experimental results for several real embedded applications, show power reduction without performance penalty range from about 21.5% to 66.2% of leakage power, and 14.5% to 59.2% of dynamic power.

元の言語英語
ページ(範囲)3200-3203
ページ数4
ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E86-A
発行部数12
出版物ステータス出版済み - 12 2003

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Leakage
Battery
Low-power Design
Parameter Design
Penalty
Tuning
Data storage equipment
Optimization
Requirements
Experimental Results
Range of data

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Information Systems

これを引用

Leakage Power Reduction for Battery-Operated Portable Systems. / Cao, Yun; Yasuura, Hiroto.

:: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 巻 E86-A, 番号 12, 12.2003, p. 3200-3203.

研究成果: ジャーナルへの寄稿記事

@article{00a99dffa86e487c880cd7738e1e5328,
title = "Leakage Power Reduction for Battery-Operated Portable Systems",
abstract = "This paper addresses bitwidth optimization focusing on leakage power reduction for system-level low-power design. By means of tuning the design parameter, bitwidth tailored to a given application requirements, the datapath width of processors and size of memories are optimized resulting in significant leakage power reduction besides dynamic power reduction. Experimental results for several real embedded applications, show power reduction without performance penalty range from about 21.5{\%} to 66.2{\%} of leakage power, and 14.5{\%} to 59.2{\%} of dynamic power.",
author = "Yun Cao and Hiroto Yasuura",
year = "2003",
month = "12",
language = "English",
volume = "E86-A",
pages = "3200--3203",
journal = "IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences",
issn = "0916-8508",
publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",
number = "12",

}

TY - JOUR

T1 - Leakage Power Reduction for Battery-Operated Portable Systems

AU - Cao, Yun

AU - Yasuura, Hiroto

PY - 2003/12

Y1 - 2003/12

N2 - This paper addresses bitwidth optimization focusing on leakage power reduction for system-level low-power design. By means of tuning the design parameter, bitwidth tailored to a given application requirements, the datapath width of processors and size of memories are optimized resulting in significant leakage power reduction besides dynamic power reduction. Experimental results for several real embedded applications, show power reduction without performance penalty range from about 21.5% to 66.2% of leakage power, and 14.5% to 59.2% of dynamic power.

AB - This paper addresses bitwidth optimization focusing on leakage power reduction for system-level low-power design. By means of tuning the design parameter, bitwidth tailored to a given application requirements, the datapath width of processors and size of memories are optimized resulting in significant leakage power reduction besides dynamic power reduction. Experimental results for several real embedded applications, show power reduction without performance penalty range from about 21.5% to 66.2% of leakage power, and 14.5% to 59.2% of dynamic power.

UR - http://www.scopus.com/inward/record.url?scp=0842267447&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0842267447&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0842267447

VL - E86-A

SP - 3200

EP - 3203

JO - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

JF - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

SN - 0916-8508

IS - 12

ER -