LOW TEMPERATURE FABRICATION OF SOI-MOSFET'S IN Si/CaF//2/Si HETEROEPITAXIAL STRUCTURES.

Tanemasa Asano, Shinichi Wakabayashi, Hiroshi Ishiwara

研究成果: 著書/レポートタイプへの貢献会議での発言

3 引用 (Scopus)

抄録

The epitaxial growth of Si films on CaF//2/Si heteroepitaxial structures and characteristics of MOSFET's fabricated in the Si/CaF//2/Si structures are investigated. Both the growth of the Si/CaF//2/Si structures and the fabrication of MOSFET's are performed at temperatures below 800 degree C. For the growth of Si films, a new growth method, which involves in situ deposition of a thin ( less than equivalent to 10nm) Si onto the CaF//2 surface at room temperature prior to deposition of Si at elevated temperatures, has been developed in order to prevent interfacial reaction between deposited Si and underlying CaF//2. Al gate n-channel MOSFET's, which are electrically isolated from the substrates, have been fabricated by utilizing plasma enhanced CVD SiO//2 as the gate insulator. The maximum field effect mobility of about 180 cm**2/V multiplied by (times) s has been obtained.

元の言語英語
ホスト出版物のタイトルConference on Solid State Devices and Materials
出版者Business Cent for Academic Soc Japan
ページ519-522
ページ数4
ISBN(印刷物)4930813077
出版物ステータス出版済み - 12 1 1984
外部発表Yes

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Fabrication
Plasma enhanced chemical vapor deposition
Surface chemistry
Epitaxial growth
Temperature
Substrates

All Science Journal Classification (ASJC) codes

  • Engineering(all)

これを引用

Asano, T., Wakabayashi, S., & Ishiwara, H. (1984). LOW TEMPERATURE FABRICATION OF SOI-MOSFET'S IN Si/CaF//2/Si HETEROEPITAXIAL STRUCTURES.Conference on Solid State Devices and Materials (pp. 519-522). Business Cent for Academic Soc Japan.

LOW TEMPERATURE FABRICATION OF SOI-MOSFET'S IN Si/CaF//2/Si HETEROEPITAXIAL STRUCTURES. / Asano, Tanemasa; Wakabayashi, Shinichi; Ishiwara, Hiroshi.

Conference on Solid State Devices and Materials. Business Cent for Academic Soc Japan, 1984. p. 519-522.

研究成果: 著書/レポートタイプへの貢献会議での発言

Asano, T, Wakabayashi, S & Ishiwara, H 1984, LOW TEMPERATURE FABRICATION OF SOI-MOSFET'S IN Si/CaF//2/Si HETEROEPITAXIAL STRUCTURES.Conference on Solid State Devices and Materials. Business Cent for Academic Soc Japan, pp. 519-522.
Asano T, Wakabayashi S, Ishiwara H. LOW TEMPERATURE FABRICATION OF SOI-MOSFET'S IN Si/CaF//2/Si HETEROEPITAXIAL STRUCTURES. : Conference on Solid State Devices and Materials. Business Cent for Academic Soc Japan. 1984. p. 519-522
Asano, Tanemasa ; Wakabayashi, Shinichi ; Ishiwara, Hiroshi. / LOW TEMPERATURE FABRICATION OF SOI-MOSFET'S IN Si/CaF//2/Si HETEROEPITAXIAL STRUCTURES. Conference on Solid State Devices and Materials. Business Cent for Academic Soc Japan, 1984. pp. 519-522
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abstract = "The epitaxial growth of Si films on CaF//2/Si heteroepitaxial structures and characteristics of MOSFET's fabricated in the Si/CaF//2/Si structures are investigated. Both the growth of the Si/CaF//2/Si structures and the fabrication of MOSFET's are performed at temperatures below 800 degree C. For the growth of Si films, a new growth method, which involves in situ deposition of a thin ( less than equivalent to 10nm) Si onto the CaF//2 surface at room temperature prior to deposition of Si at elevated temperatures, has been developed in order to prevent interfacial reaction between deposited Si and underlying CaF//2. Al gate n-channel MOSFET's, which are electrically isolated from the substrates, have been fabricated by utilizing plasma enhanced CVD SiO//2 as the gate insulator. The maximum field effect mobility of about 180 cm**2/V multiplied by (times) s has been obtained.",
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