LOW TEMPERATURE FABRICATION OF SOI-MOSFET`S IN Si/CaF2/Si HETEROEPITAXIAL STRUCTURES.

Tanemasa Asano, Shinichi Wakabayashi, Hiroshi Ishiwara

研究成果: Chapter in Book/Report/Conference proceedingConference contribution

3 被引用数 (Scopus)

抄録

The epitaxial growth of Si films on CaF//2/Si heteroepitaxial structures and characteristics of MOSFET's fabricated in the Si/CaF//2/Si structures are investigated. Both the growth of the Si/CaF//2/Si structures and the fabrication of MOSFET's are performed at temperatures below 800 degree C. For the growth of Si films, a new growth method, which involves in situ deposition of a thin ( less than equivalent to 10nm) Si onto the CaF//2 surface at room temperature prior to deposition of Si at elevated temperatures, has been developed in order to prevent interfacial reaction between deposited Si and underlying CaF//2. Al gate n-channel MOSFET's, which are electrically isolated from the substrates, have been fabricated by utilizing plasma enhanced CVD SiO//2 as the gate insulator. The maximum field effect mobility of about 180 cm**2/V multiplied by (times) s has been obtained.

本文言語英語
ホスト出版物のタイトルConference on Solid State Devices and Materials
出版社Business Cent for Academic Soc Japan
ページ519-522
ページ数4
ISBN(印刷版)4930813077, 9784930813077
DOI
出版ステータス出版済み - 1984
外部発表はい

出版物シリーズ

名前Conference on Solid State Devices and Materials

All Science Journal Classification (ASJC) codes

  • 工学(全般)

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