Memory-CPU size optimization for embedded system designs

Barry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi, Hisao Koizumi, Hiroyuki Tomiyama, Hiroto Yasuura

研究成果: Contribution to journalConference article査読

16 被引用数 (Scopus)

抄録

Entire systems embedded in a chip and consisting of a processor, memory, and system-specific peripheral hardware are now commonly contained in commodity electronic devices. Cost minimization of these systems is of paramount economic importance to manufactures of these devices. By employing a variable configuration processor in conjunction with a multi-precision compiler generator there are situations in which considerable system cost reduction can be obtained by synthesizing a CPU that is narrower than the largest variable in the application program.

本文言語英語
ページ(範囲)246-251
ページ数6
ジャーナルProceedings - Design Automation Conference
DOI
出版ステータス出版済み - 1 1 1997
外部発表はい
イベントProceedings of the 1997 34th Design Automation Conference - Anaheim, CA, USA
継続期間: 6 9 19976 13 1997

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering

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