Memory organization for low-energy processor-based application-specific systems

研究成果: ジャーナルへの寄稿記事

抄録

This paper presents a novel low-energy memory design technique based on variable analysis for on-chip data memory (RAM) in application-specific systems, which called VAbM technique. It targets the exploitation of both data locality and effective data width of variables to reduce energy consumed by data transfer and storage. Variables with higher access frequency and smaller effective data width are assigned into a smaller low-energy memory with fewer bit lines and word lines, placed closer the processor. Under constraints of the number of memory banks, VAbM technique use variable analysis results to perform allocating and assigning on-chip RAM into multiple banks, which have different size with different number of word lines and different number of bit lines tailored to each application requirements. Experimental results with several real embedded applications demonstrate significant energy reduction up to 64.8% over monolithic memory, and 27.7% compared to memory designed by memory banking technique.

元の言語英語
ページ(範囲)1616-1624
ページ数9
ジャーナルIEICE Transactions on Electronics
E85-C
発行部数8
出版物ステータス出版済み - 8 2002

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Data storage equipment
Random access storage
Data transfer

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

これを引用

Memory organization for low-energy processor-based application-specific systems. / Cao, Yun; Yasuura, Hiroto.

:: IEICE Transactions on Electronics, 巻 E85-C, 番号 8, 08.2002, p. 1616-1624.

研究成果: ジャーナルへの寄稿記事

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