Multi-level logic optimization using binary decision diagrams

Yusuke Matsunaga, Masahiro Fujita

研究成果: Chapter in Book/Report/Conference proceedingConference contribution

28 被引用数 (Scopus)

抄録

A multilevel logic optimizer, which is based on the transduction method, is introduced. The original transduction method is good for optimization, but its calculation time and storage area increase exponentially with the number of inputs because of the use of truth tables. To save CPU time and memory space, the authors implemented this algorithm using ordered binary decision diagrams (OBDD) as the data structure for representing logic functions. Since OBDD does not become as large as other representations, it can handle large circuits without partitioning.

本文言語英語
ホスト出版物のタイトルIEEE Int Conf Comput Aided Des ICCAD 89 Dig Tech Pap
編集者 Anon
出版社Publ by IEEE
ページ556-559
ページ数4
ISBN(印刷版)0818659866
出版ステータス出版済み - 1989
外部発表はい
イベントIEEE International Conference on Computer-Aided Design (ICCAD-89): Digest of Technical Papers - Santa Clara, CA, USA
継続期間: 11 5 198911 9 1989

その他

その他IEEE International Conference on Computer-Aided Design (ICCAD-89): Digest of Technical Papers
CitySanta Clara, CA, USA
Period11/5/8911/9/89

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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