High-speed thin-film transistors (TFTs) are required to develop the next generation of electronics, such as three-dimensional large-scale integrated circuits and advanced system-in-displays. For this purpose, high-carrier-mobility semiconductor films on insulator structures should be fabricated with low-temperature processing conditions (≤500 °C). To achieve this, we investigate solid-phase crystallization of amorphous-GeSn (a-GeSn) films (Sn concentration: 2% and thickness: 50-200 nm) on insulating substrates, where thin a-Si under-layers (thickness: 0-20 nm) are introduced between a-GeSn films and insulating substrates. The GeSn films are polycrystallized by annealing (450 °C, 20 h) for all samples irrespective of a-GeSn and a-Si thickness conditions, while the Si films remain amorphous. Analysis of crystal structures of GeSn films (thickness: 50 nm) reveals that grain sizes decrease from ∼10 μm to 2-3 μm by the introduction of a-Si under-layers (thickness: 3-20 nm). This phenomenon is attributed to the change in dominant nucleation sites from the interface to the bulk, which significantly decreases grain-boundary scattering of carriers through a decrease in the barrier heights at grain boundaries. Bulk-nucleation further becomes dominant by increasing the GeSn film thickness. As a result, a high carrier mobility of ∼550 cm2/V s is realized for GeSn films (thickness: 100 nm) grown with a-Si under-layers. This mobility is the largest among ever reported data for Ge and GeSn grown on an insulator. This technique will facilitate realization of high-speed TFTs for use in the next generation of electronics.
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