ON PARALLEL COMPUTATIONAL COMPLEXITY OF UNIFICATION.

研究成果: 著書/レポートタイプへの貢献会議での発言

18 引用 (Scopus)

抄録

The computational complexity of unification in first-order logic under parallel computation scheme is discussed. A parallel unification algorithm is presented on a combinational logic circuit model and its complexity is analyzed. In order to discuss the lower bound of parallel time complexity of unification, we show that unification is the one of the hardest problems in the class of problems resolved by polynomial size circuits. Namely, it seems to be difficult to design very efficient parallel algorithm for unification.

元の言語英語
ホスト出版物のタイトルUnknown Host Publication Title
出版者Ohmsha Ltd
ページ235-243
ページ数9
ISBN(印刷物)4274072215
出版物ステータス出版済み - 1984
外部発表Yes

Fingerprint

Parallel algorithms
Computational complexity
Combinatorial circuits
Logic circuits
Polynomials
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Engineering(all)

これを引用

Yasuura, H. (1984). ON PARALLEL COMPUTATIONAL COMPLEXITY OF UNIFICATION.Unknown Host Publication Title (pp. 235-243). Ohmsha Ltd.

ON PARALLEL COMPUTATIONAL COMPLEXITY OF UNIFICATION. / Yasuura, Hiroto.

Unknown Host Publication Title. Ohmsha Ltd, 1984. p. 235-243.

研究成果: 著書/レポートタイプへの貢献会議での発言

Yasuura, H 1984, ON PARALLEL COMPUTATIONAL COMPLEXITY OF UNIFICATION.Unknown Host Publication Title. Ohmsha Ltd, pp. 235-243.
Yasuura H. ON PARALLEL COMPUTATIONAL COMPLEXITY OF UNIFICATION. : Unknown Host Publication Title. Ohmsha Ltd. 1984. p. 235-243
Yasuura, Hiroto. / ON PARALLEL COMPUTATIONAL COMPLEXITY OF UNIFICATION. Unknown Host Publication Title. Ohmsha Ltd, 1984. pp. 235-243
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