Optimal intermediate bus capacitance for system stability on distributed power architecture

Seiya Abe, Masahiko Hirokawa, Masahito Shoyama, Tamotsu Ninomiya

研究成果: 書籍/レポート タイプへの寄稿会議への寄与

7 被引用数 (Scopus)

抄録

The power supply system which requires the low-voltage / high-current output has been changing from conventional centralized power system to distributed power system. The distributed power system consists of bus converter and POL. The most important factor is the system stability in bus architecture design. The overlap between the output impedance of bus converter and input impedance of POL causes system instability, and it has been an actual problem. Increasing the bus capacitor, system stability can be reduced easily. However, due to the limited space on the system board, increasing of bus capacitors is impractical. The urgent solution of the issue is desired strongly. This paper presents the output impedance design for on-board distributed power system by means of full-regulated bus converter. The output impedance peak of the bus converter and the input impedance of the POL are analyzed, and it is conformed by experimentally for stability criterion. Furthermore, the optimal intermediate bus capacitance design for system stability is proposed.

本文言語英語
ホスト出版物のタイトルPESC '08 - 39th IEEE Annual Power Electronics Specialists Conference - Proceedings
ページ611-616
ページ数6
DOI
出版ステータス出版済み - 9月 29 2008
イベントPESC '08 - 39th IEEE Annual Power Electronics Specialists Conference - Rhodes, ギリシャ
継続期間: 6月 15 20086月 19 2008

出版物シリーズ

名前PESC Record - IEEE Annual Power Electronics Specialists Conference
ISSN(印刷版)0275-9306

その他

その他PESC '08 - 39th IEEE Annual Power Electronics Specialists Conference
国/地域ギリシャ
CityRhodes
Period6/15/086/19/08

!!!All Science Journal Classification (ASJC) codes

  • モデリングとシミュレーション
  • 凝縮系物理学
  • エネルギー工学および電力技術
  • 電子工学および電気工学

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