Power-capped DVFS and thread allocation with ANN models on modern NUMA systems

Satoshi Imamura, Hiroshi Sasaki, Koji Inoue, Dimitrios S. Nikolopoulos

研究成果: Chapter in Book/Report/Conference proceedingConference contribution

抄録

Power capping is an essential function for efficient power budgeting and cost management on modern server systems. Contemporary server processors operate under power caps by using dynamic voltage and frequency scaling (DVFS). However, these processors are often deployed in non-uniform memory access (NUMA) architectures, where thread allocation between cores may significantly affect performance and power consumption. This paper proposes a method which maximizes performance under power caps on NUMA systems by dynamically optimizing two knobs: DVFS and thread allocation. The method selects the optimal combination of the two knobs with models based on artificial neural network (ANN) that captures the nonlinear effect of thread allocation on performance. We implement the proposed method as a runtime system and evaluate it with twelve multithreaded benchmarks on a real AMD Opteron based NUMA system. The evaluation results show that our method outperforms a naive technique optimizing only DVFS by up to 67.1%, under a power cap.

本文言語英語
ホスト出版物のタイトル2014 32nd IEEE International Conference on Computer Design, ICCD 2014
出版社Institute of Electrical and Electronics Engineers Inc.
ページ324-331
ページ数8
ISBN(電子版)9781479964925
DOI
出版ステータス出版済み - 12 3 2014
イベント32nd IEEE International Conference on Computer Design, ICCD 2014 - Seoul, 大韓民国
継続期間: 10 19 201410 22 2014

出版物シリーズ

名前2014 32nd IEEE International Conference on Computer Design, ICCD 2014

その他

その他32nd IEEE International Conference on Computer Design, ICCD 2014
Country大韓民国
CitySeoul
Period10/19/1410/22/14

All Science Journal Classification (ASJC) codes

  • Computer Graphics and Computer-Aided Design
  • Computer Science Applications

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