Currently, low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs), which are characterized by high mobility of electrons, are fabricated by excimer laser annealing. High mobility in low-temperature polycrystalline silicon is achieved by controlling the grain size to approximately 300 nm. However, with future potential growth of active-matrix organic light-emitting diodes in terms of their increasing use as backlight in active matrix micro-LEDs, even higher mobility is required. One of the methods to improve mobility is to produce grains of sizes above 300 nm. However, as far as we know, there are no reports of investigating the dependence between the device characteristics and the grain size of above 300 nm. In this study, we examine the possibility of controlling the grain size above approximately 350 nm by laser annealing with an intensity distribution and investigate the grain size dependence of the TFT characteristics. We show that the grain size can be controlled approximately in the range of 1-2.5 μm, and mobility of 248±28 cm2 V-1s-1 is achieved at a grain size of 2.5 μm. Furthermore, we compare the device characteristics of the step-and-repeat and scan annealing and verify that the device characteristics do not deteriorate even during scan annealing. The study confirms that it is technically possible to produce LTPS with grain sizes controlled in the range of 1-2.5 μm for customizing device characteristics.
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