### 抄録

This paper presents new results on an innovative approach for solving satisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field Programmable Gate Arrays (FPGAs). This approach has become feasible due to recent advances in Reconfigurable Computing, and has opened up an exciting new research field in algorithm design. We have developed an algorithm that is suitable for a logic circuit implementation. This algorithm is basically equivalent to the Davis-Putnam procedure with Experimental Unit Propagation. The algorithm requires fewer hardware resources than previous approaches. Simulation results show that this method can solve a hard random 3-SAT problem with 400 variables within 1.6 minutes at a clock rate of 10MHz. Faster speeds can be obtained by increasing the clock rate. Furthermore, we have actually implemented a 128-variable, 256-clause problem instance on FPGAs.

元の言語 | 英語 |
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ホスト出版物のタイトル | Principles and Practice of Constraint Programming – CP 1999 - 5th International Conference, CP 1999, Proceedings |

編集者 | Joxan Jaffar |

出版者 | Springer Verlag |

ページ | 434-445 |

ページ数 | 12 |

ISBN（印刷物） | 3540666265, 9783540666264 |

DOI | |

出版物ステータス | 出版済み - 1 1 1999 |

外部発表 | Yes |

イベント | 5th International Conference on Principles and Practice of Constraint Programming, CP 1999 - Alexandria, 米国 継続期間: 10 11 1999 → 10 14 1999 |

### 出版物シリーズ

名前 | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
---|---|

巻 | 1713 |

ISSN（印刷物） | 0302-9743 |

ISSN（電子版） | 1611-3349 |

### その他

その他 | 5th International Conference on Principles and Practice of Constraint Programming, CP 1999 |
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国 | 米国 |

市 | Alexandria |

期間 | 10/11/99 → 10/14/99 |

### Fingerprint

### All Science Journal Classification (ASJC) codes

- Theoretical Computer Science
- Computer Science(all)

### これを引用

*Principles and Practice of Constraint Programming – CP 1999 - 5th International Conference, CP 1999, Proceedings*(pp. 434-445). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 1713). Springer Verlag. https://doi.org/10.1007/978-3-540-48085-3_31

**Solving satisfiability problems on FPGAs using experimental unit propagation.** / Suyama, Takayuki; Yokoo, Makoto; Nagoya, Akira.

研究成果: 著書/レポートタイプへの貢献 › 会議での発言

*Principles and Practice of Constraint Programming – CP 1999 - 5th International Conference, CP 1999, Proceedings.*Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 巻. 1713, Springer Verlag, pp. 434-445, 5th International Conference on Principles and Practice of Constraint Programming, CP 1999, Alexandria, 米国, 10/11/99. https://doi.org/10.1007/978-3-540-48085-3_31

}

TY - GEN

T1 - Solving satisfiability problems on FPGAs using experimental unit propagation

AU - Suyama, Takayuki

AU - Yokoo, Makoto

AU - Nagoya, Akira

PY - 1999/1/1

Y1 - 1999/1/1

N2 - This paper presents new results on an innovative approach for solving satisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field Programmable Gate Arrays (FPGAs). This approach has become feasible due to recent advances in Reconfigurable Computing, and has opened up an exciting new research field in algorithm design. We have developed an algorithm that is suitable for a logic circuit implementation. This algorithm is basically equivalent to the Davis-Putnam procedure with Experimental Unit Propagation. The algorithm requires fewer hardware resources than previous approaches. Simulation results show that this method can solve a hard random 3-SAT problem with 400 variables within 1.6 minutes at a clock rate of 10MHz. Faster speeds can be obtained by increasing the clock rate. Furthermore, we have actually implemented a 128-variable, 256-clause problem instance on FPGAs.

AB - This paper presents new results on an innovative approach for solving satisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field Programmable Gate Arrays (FPGAs). This approach has become feasible due to recent advances in Reconfigurable Computing, and has opened up an exciting new research field in algorithm design. We have developed an algorithm that is suitable for a logic circuit implementation. This algorithm is basically equivalent to the Davis-Putnam procedure with Experimental Unit Propagation. The algorithm requires fewer hardware resources than previous approaches. Simulation results show that this method can solve a hard random 3-SAT problem with 400 variables within 1.6 minutes at a clock rate of 10MHz. Faster speeds can be obtained by increasing the clock rate. Furthermore, we have actually implemented a 128-variable, 256-clause problem instance on FPGAs.

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U2 - 10.1007/978-3-540-48085-3_31

DO - 10.1007/978-3-540-48085-3_31

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SN - 3540666265

SN - 9783540666264

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

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EP - 445

BT - Principles and Practice of Constraint Programming – CP 1999 - 5th International Conference, CP 1999, Proceedings

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PB - Springer Verlag

ER -