System LSI design methods for low power LSIs

Hiroto Yasuura, Tohru Ishihara

研究成果: ジャーナルへの寄稿記事

4 引用 (Scopus)

抄録

Low Power design has emerged as a both practically and theoretically attractive theme in modern LSI system design. This paper presents system level power optimization techniques. A brief survey of system level low power design approaches and several examples in detail are described. It reviews some techniques that have been proposed to overcome the power issue and gives guideline for prospective system level solutions.

元の言語英語
ページ(範囲)143-152
ページ数10
ジャーナルIEICE Transactions on Electronics
E83-C
発行部数2
出版物ステータス出版済み - 1 1 2000

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Systems analysis

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

これを引用

System LSI design methods for low power LSIs. / Yasuura, Hiroto; Ishihara, Tohru.

:: IEICE Transactions on Electronics, 巻 E83-C, 番号 2, 01.01.2000, p. 143-152.

研究成果: ジャーナルへの寄稿記事

Yasuura, H & Ishihara, T 2000, 'System LSI design methods for low power LSIs', IEICE Transactions on Electronics, 巻. E83-C, 番号 2, pp. 143-152.
Yasuura, Hiroto ; Ishihara, Tohru. / System LSI design methods for low power LSIs. :: IEICE Transactions on Electronics. 2000 ; 巻 E83-C, 番号 2. pp. 143-152.
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