Thermal Deformation Analysis of Flip-Chip Devices by Moire Interferometry

Yasuyuki Morita, Kazuo Arakawa, Mitsugu Todo, Masayuki Kaneto

研究成果: Contribution to journalArticle査読

1 被引用数 (Scopus)

抄録

Moire interferometry technique was adopted to analyze thermal deformations of four kinds of flip-chip devices mounted on FR-4 substrate and multi-layer substrate, with and without underfill. A thermal loading was applied by heating the devices from room temperature 25°C to an elevated temperature 100°C. The experimental results showed that the underfill gave similar curvatures of silicon chip and the substrate. In the flip-chip devices mounted on the multi-layer substrate, thermal expansion coefficient mismatch between the chip and substrate was reduced, and bending deformations were decreased. The deformation of solder balls in the underfilled flip-chip device mounted on the multi-layer substrate was the least in the four kinds of flip-chip devices.

本文言語英語
ページ(範囲)654-659
ページ数6
ジャーナルJournal of The Japan Institute of Electronics Packaging
5
7
DOI
出版ステータス出版済み - 2002

All Science Journal Classification (ASJC) codes

  • 電子工学および電気工学

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