This paper presents a model of dynamically variable voltage processor and basic theorems for power-delay optimization. A static voltage scheduling problem is also proposed and formulated as an integer linear programming (ILP) problem. In the problem, we assume that a core processor can vary its supply voltage dynamically, but can use only a single voltage level at a time. For a given application program and a dynamically variable voltage processor, a voltage scheduling which minimizes energy consumption under an execution time constraint can be found.
|出版ステータス||出版済み - 1998|
|イベント||Proceedings of the 1998 International Symposium on Low Power Electronics and Design - Monterey, CA, USA|
継続期間: 8 10 1998 → 8 12 1998
|その他||Proceedings of the 1998 International Symposium on Low Power Electronics and Design|
|City||Monterey, CA, USA|
|Period||8/10/98 → 8/12/98|
All Science Journal Classification (ASJC) codes