Width and depth of combinational logic circuits

Hiroto Yasuura

研究成果: Contribution to journal › Article › 査読

本文言語	英語
ページ（範囲）	191-194
ページ数	4
ジャーナル	Information Processing Letters
巻	13
号	4-5
DOI	https://doi.org/10.1016/0020-0190(81)90056-9
出版ステータス	出版済み - 1981
外部発表	はい

All Science Journal Classification (ASJC) codes

@article{92b7680997ba4c0db6e3d43142ac17e3,

title = "Width and depth of combinational logic circuits",

author = "Hiroto Yasuura",

year = "1981",

doi = "10.1016/0020-0190(81)90056-9",

language = "English",

volume = "13",

pages = "191--194",

journal = "Information Processing Letters",

issn = "0020-0190",

publisher = "Elsevier",

number = "4-5",

}

TY - JOUR

T1 - Width and depth of combinational logic circuits

AU - Yasuura, Hiroto

PY - 1981

Y1 - 1981

UR - http://www.scopus.com/inward/record.url?scp=0019654483&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0019654483&partnerID=8YFLogxK

U2 - 10.1016/0020-0190(81)90056-9

DO - 10.1016/0020-0190(81)90056-9

M3 - Article

AN - SCOPUS:0019654483

VL - 13

SP - 191

EP - 194

JO - Information Processing Letters

JF - Information Processing Letters

SN - 0020-0190

IS - 4-5

ER -